1) Field of the Invention
The present invention relates to a direct memory access (DMA) controller that performs DMA transfer for a plurality of data transfer channels, and a DMA transfer method therefor.
2) Description of the Related Art
A system that employs a central processing unit (“CPU”) conventionally has a DMA transfer function. The DMA transfer function means performing data transfer without causing the CPU to intervene so as to transfer data between a plurality of peripherals and a memory at high rate. This DMA transfer function is controlled by a DMA controller, the basic operation of which will be explained below.
If a DMA request is issued from a peripheral allocated to each channel, to the DMA controller, the DMA controller issues a bus hold request to the CPU. If a plurality of DMA requests are issued from peripherals, the DMA controller prepares for data transfer for the highest priority channel in accordance with preset priorities.
If the CPU accepts the bus hold request from the DMA controller, the CPU hands over a bus management right to the DMA controller. The DMA controller starts the data transfer between the memory and the peripherals using the bus as a DMA transfer data path. The data transfer is performed while DMA requests are continuously issued. In a burst mode, the data transfer of a preset size can be performed.
However, the conventional technique is always required to take arbitration procedures for the bus management right between the DMA controller and the CPU as a preparation for starting the DMA transfer. As a result, if the DMA transfer is frequently performed, the arbitration procedures disadvantageously deteriorate data transfer efficiency.
Although it is possible to decrease DMA transfer frequency by using the burst mode, the burst mode increases a data length and bus occupation time per channel tends to increase, accordingly. This results in an increase in wait time until a DMA request is processed, disadvantageously causing latency to the data between the channels. Besides, a buffer necessary to hold data needs to be large in size.